This invention generally relates to integrated circuit device carriers, commonly known as packages, on which devices can be bonded for electrical contact and mechanical support. More particularly, the invention relates to the technique of and structure for making engineering changes in such carriers to alter the original circuit designs of the carriers or to correct wiring defects.
In modern integrated circuit packaging technology, many integrated circuit devices may be mounted on a substrate containing a printed circuit network that interconnects the devices with each other and to input and output terminals on the substrate. Such substrates, normally made of ceramic material, are very complex, containing 30 or more layers of ceramic sheets. Typically, the internal printed circuit network of the substrate is comprised of a multitude of lines or traces on a given layer, and a multitude of connectors or small connecting assemblies, between the layers. These connectors or connecting assemblies are referred to as vias.
The lines or traces of the network extend internally of the substrate, in one or more planes parallel to a top surface of the substrate; and the vias are electrically connected to these internal lines or traces and extend upward therefrom to the top surface of the substrate, thereby providing access to the internal circuit network. Even more specifically, the internal lines or traces of the network are comprised of the first set of parallel conductive lines that extend in a first direction, referred to as the X direction, and a second set of parallel conductive lines that extend in a second direction perpendicular to the above-mentioned first direction, and referred to as the y direction.
After the substrate has been laminated and sintered, there is no practical way of changing the buried internal network. However, it often becomes necessary to modify the circuit design of the substrate, either to correct defective lines or vias, or to make changes to the basic circuitry. Such basic changes may be appropriate to accommodate changes in the integrated circuit devices carried on the substrate, to upgrade the substrate or to modify it for use with different circuit devices.
The changes needed to modify the internal circuit network of a substrate or carrier are referred to as engineering changes; and the contingency that such changes may be needed is typically provided for by the use of engineering change pads, which are small, electrically conductive locations on the top surface of the substrate of the carrier. Engineering change pads surround each integrated circuit device mounted on the substrate, and a respective one engineering change pad is associated with each signal (logic) terminal of each circuit device carried on the substrate. Fan out metallurgy is normally provided on the top surface or on the top layers of the substrate to connect each integrated circuit device terminal with the associated engineering change pad, and each engineering change pad is also connected to buried circuitry in the substrate, to thereby connect the associated circuit device terminal with other circuit devices and/or input/output terminal on the substrate.
To bypass a defective line or trace buried in the substrate, or to otherwise modify the internal circuitry of the substrate, an engineering change pad is cut or severed to electrically disconnect that engineering change pad, and the associated circuit device terminal, from the internal circuitry inside the substrate. One end of a wire is then joined to the portion of the engineering change pad still electrically connected to the associated circuit device terminal. The other end of the wire is then joined to a second engineering change pad that had been similarly cut or severed, thereby electrically connecting the first circuit device terminal to a second terminal or to the internal circuitry connected to the second engineering change pad. The same basic technique can be used to substitute for defective electric lines in a substrate and to change the internal electric network of the substrate.
While the engineering change technique described above works well, there are some disadvantages. For example, in order to accommodate the necessary wire bonding, the engineering change pads are relatively large, compared to the terminals of the integrated circuit devices carried by the substrate, and thus the engineering change pads occupy a great deal of space on the top surface of the substrate. As integrated circuit devices become smaller, more such devices can be mounted on a given area on a substrate surface. When this is done, there is a corresponding increase in the number of device logic terminals in a given area on the substrate. The additional device terminals require additional engineering change pads; and with the size of the engineering change pads constrained to accommodate wire bonding, the total area required by the engineering change pads increases dramatically. Indeed, for an integrated circuit device carrier having a high density of device logic terminals, there simply is not enough room on the carrier to provide one engineering change pad for each circuit device terminal.